GATE 1989
Related Computer Organization PYQs
In an instruction pipeline, a WAW (Write-After-Write) hazard occurs when:
Which cache mapping scheme requires associative comparators for all cache entries simultaneously?
Match each addressing mode in List I with the corresponding data element or data-structure element in List II. | List I: Addressi…
Consider a processor P whose instruction set architecture is the load-store architecture. The instruction format is such that the …
Which one of the following dependencies among the register operands of different instructions can cause a data hazard in a pipelin…
Consider the 8-bit signed integers X, Y and Z represented using the sign-magnitude form. The binary representations of X and Y are…
Free account benefits
Turn practice into measurable progress
Public PYQs and reference pages stay free. Sign in when you want GATEverse to remember what you studied and guide what to practise next.
Saved progressKeep answers, mock results and completion history across devices.
Adaptive practiceGet questions matched to your recent accuracy and difficulty level.
Bookmarks and notesBuild a personal revision list and record why a question was difficult.
Performance insightsSee weak subjects, accuracy trends, streaks and exam readiness.