GATE 1991
Branch prediction strategies in pipelined architectures are used to reduce stalls caused by:
In accumulator-based processor architectures, arithmetic instructions typically use which instruction format?
Daisy chaining is a hardware mechanism used for:
What is the decimal value of the biased exponent in IEEE 754 single-precision format for the exponent value 0?
In an instruction cycle, the sequence of operations is:
In register indirect addressing mode, the instruction specifies:
Match each addressing mode in List I with the corresponding data element or data-structure element in List II. | List I: Addressi…
Free account benefits
Public PYQs and reference pages stay free. Sign in when you want GATEverse to remember what you studied and guide what to practise next.