GATE 2013 · session-1
A computer uses 46-bit virtual addresses, 32-bit physical addresses, and a three-level paged page-table organization. The page-table base register stores the base address of the first-level table T1, which occupies exactly one page. Each T1 entry stores the base address of a page of the second-level table T2. Each T2 entry stores the base address of a page of the third-level table T3. Each T3 entry is a 32-bit page-table entry (PTE). The processor has a 1 MB 16-way set-associative virtually indexed physically tagged cache, with 64-byte blocks.
What is the minimum number of page colours needed to guarantee that no two synonyms map to different sets in the processor cache?